Datasheet

Rev. 3.00, 03/04, page 806 of 830
SCK0 to SCK2
TxD0 to TxD2
(transmit data)
RxD0 to RxD2
(receive data)
t
TXD
t
RXH
t
RXS
Figure 25.27 SCI Input/Output Timing (Clock Synchronous Mode)
φ
t
TRGS
ADTRG
Figure 25.28 A/D Converter External Trigger Input Timing
φ
RESO
t
RESD
t
RESD
t
RESOW
Figure 25.29 WDT Output Timing (RESO)