Datasheet

Rev. 3.00, 03/04, page 796 of 830
φ
AS*
t
RSD2
t
AS
t
ACC4
t
RSD1
t
ASD
t
ASD
t
AD
t
ACC5
t
RDH
t
WRD2
t
WRD1
t
WSW2
t
WDD
t
WDH
T
1
T
3
RD
(Read)
D15 to D0
(Read)
HWR, LWR
(Write)
D15 to D0
(Write)
t
WDS
T
2
t
RDS
t
AH
t
AS
Note: * AS is multiplexed with IOS. Either the AS or IOS function can be selected by the IOSE bit of SYSCR.
t
CSD
t
AH
A23 to A0, IOS*
CS256, CPCS1
Figure 25.13 Basic Bus Timing/3-State Access