Datasheet

Rev. 3.00, 03/04, page 788 of 830
25.3 AC Characteristics
Figure 25.3 shows the test conditions for the AC characteristics.
3 V
R
L
I/O timing test levels
• Low level : 0.8 V
• High level : 1.5 V
R
H
C
LSI output pin
C = 30pF : All ports
R
L
= 2.4 kΩ
R
H
= 12 kΩ
Figure 25.3 Output Load Circuit
25.3.1 Clock Timing
Table 25.4 shows the clock timing. The clock timing specified here covers clock output (φ) and
clock pulse generator (crystal) and external clock input (EXTAL pin) oscillation stabilization
times. For details of external clock input (EXTAL pin and EXCL pin) timing, see table 25.5 and
25.6.
Table 25.4 Clock Timing
Condition: VCC = 3.0 V to 3.6 V, VSS = 0 V, φ = 5 MHz to 33 MHz
Item Symbol Min. Max. Unit Reference
Clock cycle time t
cyc
30 200 ns
Clock high level pulse
width
t
CH
10 
Clock low level pulse width t
CL
10 
Clock rise time t
Cr
 5
Clock fall time t
Cf
 5
Figure 25.4
Reset oscillation
stabilization (crystal)
t
OSC1
10  ms Figure 25.5
Software standby
oscillation stabilization time
(crystal)
t
OSC2
8  Figure 25.6