Datasheet

Rev. 3.00, 03/04, page 786 of 830
Item Symbol Min. Typ. Max. Unit
Test
Conditions
During A/D, D/A conversion AI
cc
 1.0 2.0 mA Analog
power
supply
current
A/D, D/A conversion
standby
 2.5 5.0 µA
During A/D conversion AI
ref
 0.1 1.0 mA Reference
power
supply
current
During A/D, D/A conversion  0.5 5.0
A/D, D/A conversion
standby
 0.5 5.0 µA
Input
capacitance
All input pin C
in
  10 pF V
in
= 0 V, f = 1 MHz,
T
a
= 25 °C
RAM standby voltage V
RAM
3.0   V
VCC start voltage VCC
START
 0 0.8 V
VCC rising edge SVCC   20 ms/V
Notes: 1. Do not leave the AVCC, AVref, and AVSS pins open even if the A/D converter or D/A converter is
not used.
Even if the A/D converter or D/A converter is not used, apply a value in the range from 3.0 V to 3.6
V to the AVCC and AVref pins by connecting them to the power supply (VCC). The relationship
between these two pins should be AVref ≤ AVCC.
2. When noise cancel has been enabled.
3. An external pull-up resistor is necessary to provide high-level output from SCL5 to SCL0 and
SDA5 to SDA0 (ICE bit in ICCR is 1).
4. Port 8, C0 to C5, D6, and D7 are NMOS push-pull outputs.
Port 8, C0 to C5, D6, D7, and SCK0 to SCK2 (ICE bit in ICCR = 0) high levels are driven by
NMOS. An external pull-up resistor is necessary to provide high-level output from these pins when
they are used as an output.
5. Current consumption values are for V
IH
min = VCC – 0.2 V and V
IL
max = 0.2 V with all output pins
unloaded and the on-chip pull-up MOSs in the off state.
6. When VCC = 3.0 V, V
IH
min = VCC – 0.2 V, and V
IL
max = 0.2 V.