Datasheet

Rev. 3.00, 03/04, page 784 of 830
25.2 DC Characteristics
Table 25.2 lists the DC characteristics. Table 25.3 lists the permissible output currents. Table 25.4
lists the bus drive characteristics.
Table 25.2 DC Characteristics (1)
Conditions: VCC = 3.0 V to 3.6 V, AVCC*
1
= 3.0 V to 3.6 V,
AVref*
1
= 3.0 V to AVCC, VSS = AVSS*
1
= 0 V
Item
Symbol
Min.
Typ.
Max.
Unit
Test
Conditions
V
T
VCC × 0.2
V
T
+
VCC × 0.7
P67 to P60*
2
, EVENT15 to
EVENT0, (Ex)TMIY, (Ex)TMIX,
(Ex)TMI1, (Ex)TMI0,
(Ex)IRQ15 to (Ex)IRQ2, IRQ1,
IRQ0, KIN15 to KIN0, WUE15
to WUE8, ETRST,XTAL,
EXCL, ADTRG
V
T
+
- V
T
VCC × 0.05
V
T
VCC × 0.3
V
T
+
VCC × 0.7
Schmitt
trigger
input
voltage
SCL5 to SCL0, SDA5 to SDA0
(1)
V
T
+
- V
T
VCC × 0.05
V
RES, STBY, NMI, FWE, MD2,
MD1 MD0
VCC
× 0.9 VCC + 0.3
EXTAL VCC
× 0.7 VCC + 0.3
Port 7 2.2 AVCC + 0.3
SCL5 to SCL0, SDA5 to SDA0 5.5
CLKRUN, GA20, PME, LSMI,
LSCI, SERIRQ, LAD3 to LAD0,
LPCPD, LCLK,
LRESET,LFRAME
(2)
VCC × 0.5 VCC + 0.3
Input
high
voltage
Input pins other than (1) and (2)
above
V
IH
2.2 VCC + 0.3
RES, STBY, NMI, FWE, MD2,
MD1, MD0
–0.3 VCC
× 0.1
–0.3
VCC
× 0.1 f > 25 MHz EXTAL
–0.3
VCC
× 0.2 f 25 MHz
Port 7 –0.3 AVCC
× 0.2
CLKRUN, GA20, PME, LSMI,
LSCI, SERIRQ, LAD3 to LAD0,
LPCPD, LCLK,
LRESET,LFRAME
(3)
–0.3 VCC
× 0.3
Input
low
voltage
Input pins other than (1) and (3)
above
V
IL
–0.3 VCC
× 0.2