Rev. 3.00, 03/04, page 586 of 830
Slave CPU Master CPU
ODR1 write
Write 1 to IRQ1E1
OBF1 = 0?
Yes
No
No
Yes
All bytes
transferred?
SERIRQ IRQ1 output
SERIRQ IRQ1
source clearance
Interrupt initiation
ODR1 read
Hardware operation
Software operation
Figure 16.12 HIRQ Flowchart (Example of Channel 1)
