Datasheet

Rev. 3.00, 03/04, page 580 of 830
Notes: System reset: Reset by STBY input, RES input, or WDT overflow
LPC reset: Reset by LPC hardware reset (HR) or LPC software reset (SR)
LPC shutdown: Reset by LPC hardware shutdown (HS) or LPC software shutdown (SS)
Figure 16.9 shows the timing of the LPCPD and LRESET signals.
LPCPD
LRESET
LAD3 to LAD0
LFRAME
LCLK
At least 30 µs
At least 100 µs
At least 60 µs
Figure 16.9 Power-Down State Termination Timing