Datasheet

Rev. 3.00, 03/04, page 564 of 830
16.3.25 BT Interrupt Mask Register (BTIMSR)
BTIMSR is one of the registers used to implement BT mode.
The BTIMSR register contains the bits used to control the interrupts to the host.
R/W
Bit Bit Name Initial Value Slave Host Description
7 BMC_
HWRST
0 R/(W)*
2
R/(W)*
1
Slave Reset
Performs a reset from the host to the slave. The
host can only write a 1. Writing a 0 to this bit is
invalid. The host will always return a 0 on read
out. Setting the RSTRENBL bit enables a 1 to be
read from the host.
0: The reset is cancelled
[Clearing condition]
When the slave writes a 0, after a 1 has been
read from BMC_HWRST.
1: The reset is in progress.
[Setting condition]
When the host writes a 1.
6
5


0
0
R/W
R/W
R/W
R/W
Reserved
4
3
2
OEM3
OEM2
OEM1
0
0
0
R/W
R/W
R/W
R/(W)*
4
R/(W)*
4
R/(W)*
4
User defined bit
These bits are defined by the user and are valid
only when set to 1 by a 0 written from the host.
0: [Clearing condition]
When the slave writes a 0, after a 1 has been
read from OEM.
1: [Setting condition]
When the slave writes a 1, after a 0 has been
read from OEM, or when the host writes a 0.