Datasheet

Rev. 3.00, 03/04, page 545 of 830
16.3.13 Host Interface Select Register (HISEL)
HISEL selects the function of bits 7 to 4 in the STR3 register. In addition, this register selects the
output of host interrupt request signal of each frame.
R/W
Bit Bit Name Initial Value Slave Host Description
7 SELSTR3 0 R/W  STR3 Register Function Select 3
Sets the functions of bits 7 to 4 in STR3 together
with the TWRE bit in LADR3L. For details see
section 16.3.9, Status Register 1 to 3 (STR1 to
STR3).
0: Bits 7 to 4 in STR3 is the LPC interface status bits
1: [When TWRE = 0]
Bits 7 to 4 in STR3 are defined by user.
[When TWRE = 1]
Bits 7 to 4 in STR3 are the LPC interface status
bits.
6
5
4
3
2
1
0
SELIRQ11
SELIRQ10
SELIRQ9
SELIRQ6
SELSMI
SELIRQ12
SELIRQ1
All 0 R/W 
Selects the SERIRQ Output
These bits select the output status for LPC host
interrupt request (HIRQ11, HIRQ10, HIRQ9, HIRQ6,
SMI, HIRQ12, and HIRQ1).
0: [When host interrupt request has been cleared]
The SERIRQ output is high impedance.
[When host interrupt request has been set]
The SERIRQ output is 0 level.
1: [When host interrupt request has been cleared]
The SERIRQ output is 0 level.
[When host interrupt request has been set]
The SERIRQ output is high impedance.