Datasheet

Rev. 3.00, 03/04, page 494 of 830
15.5 Interrupt Source
The IIC interrupt source is IICI. The IIC interrupt sources and their priority order are shown in
table 15.10. Each interrupt source is enabled or disabled by the ICCR interrupt enable bit and
transferred to the interrupt controller independently.
The IICI0 to IICI3 interrupts can be used as sources of activating the on-chip DTC.
Table 15.10 IIC Interrupt Source
Channel
Bit
Name
Enable
Bit Interrupt Source
Interrupt
Flag DTC Activation Priority
2 IICI2 IEIC I
2
C bus interface interrupt
request
IRIC Possible High
3 IICI3 IEIC I
2
C bus interface interrupt
request
IRIC Possible
0 IICI0 IEIC I
2
C bus interface interrupt
request
IRIC Possible
1 IICI1 IEIC I
2
C bus interface interrupt
request
IRIC Possible
4 IICI4 IEIC I
2
C bus interface interrupt
request
IRIC Not possible
5 IICI5 IEIC I
2
C bus interface interrupt
request
IRIC Not possible Low