Datasheet

Rev. 3.00, 03/04, page 10 of 830
Type Symbol Pin No. I/O Name and Function
AD15 to
AD8
96 to 103 Input/
Output
8-bit, upper 16-bit bus Address/
data
multiplex
bus
AD7 to
AD0
104 to 110,
112
Lower 16-bit bus
WAIT 17 Input Requests insertion of a wait state in the bus cycle
when accessing an external 3-state address
space.
RD 21 Output This pin is low when the external address space
is being read.
HWR 20 Output This pin is low when the external address space
is to be written to, and the upper half of the data
bus is enabled.
LWR 24 Output This pin is low when the external address space
is to be written to, and the lower half of the data
bus is enabled.
AS/IOS 19 Output This pin is low when address output on the
address bus is valid.
CS256 17 Output Indicates that the 256k-byte area from H'F80000
to H'FBFFFF is accessed.
CPCS1 22 Output Indicates that the CP extended area is accessed.
Bus control
AH 23 Output Address latch signal for address/data multiplex
bus.
NMI 11 Input Nonmaskable interrupt request input pin
IRQ15 to
IRQ0
6, 5, 137,
136, 134,
133, 15,
16, 4 to 2,
138, 132 to
129
Interrupts
ExIRQ15
to ExIRQ2
43 to 50
75 to 70
Input These pins request a maskable interrupt.
Selectable to which pin of IRQn or ExIRQn to
insert IRQ15 to IRQ2 interrupts.
ETRST 91 Input
ETMS 87 Input
ETDO 88 Output
ETDI 89 Input
Boundary
scan
ETCK 90 Input
Boundary scan interface pins