Datasheet

Rev. 3.00, 03/04, page 430 of 830
14.11.3 CRC Operation Circuit Operation
The CRC operation circuit generates a CRC code for LSB-first/MSB-first communications. An
example in which a CRC code for hexadecimal data H'F0 is generated using the X
16
+ X
12
+ X
5
+ 1
polynomial with the G1 and G0 bits in CRCCR set to B'11 is shown below.
CRCCR
CRCDORH
CRCDORL
CRCDOR clearing
1. Write H'83 to CRCCR
1
7
0 0 0 00
0
7
0
7
0
7
0
1
1
0 0 0 0 0 000
0 0 0 0 0 000
CRCDIR
CRCDORH
CRCDORL
CRC code generation
2. Write H'F0 to CRCDIR
1 1 1 1 0 000
1 1 1 1 0 111
1 0 0 0 1 111
CRC code = H'F78F
CRC code
Output
Data
3. Read from CRCDOR
7
7
7FFF08
7
00 0
4. Serial transmission (LSB first)
1 1 1 1 0 1
1
1
1 0 0 0 1 11
1
1 1 1 1 0 00
0
Figure 14.46 LSB-First Data Transmission
CRCCR
CRCDORH
CRCDORL
CRCDOR clearing
1. Write H'87 to CRCCR
1
7
0 0 0 01
0
7
0
7
0
7
0
1
1
0 0 0 0 0 000
0 0 0 0 0 000
CRCDIR
CRCDORH
CRCDORL
CRC code generation
2. Write H'F0 to CRCDIR
1 1 1 1 0 000
1 1 1 0 1 111
0 0 0 1 1 111
CRC code = H'EF1F
CRC code
Output
Data
3. Read from CRCDOR
7
7
0FF1FE
7
00 0
4. Serial transmission (MSB first)
1 1 1 1 0 0
0
0
1 1 1 0 1 11
1
0 0 0 1 1 11
1
Figure 14.47 MSB-First Data Transmission