Datasheet

Rev. 3.00, 03/04, page 2 of 830
Package Code Body Size Pin Pitch
TQFP-144 TFP-144 16.0 × 16.0 mm 0.4 mm
1.2 Internal Block Diagram
RAM
ROM
(Flash memory)
AVCC
AVref
AVSS
VCC VCL VSS
H8S/2000 CPU
DTC
EVENT8/PB0 EVENT9/PB1
EVENT10/PB2 EVENT11/PB3 EVENT12/PB4 EVENT13/PB5 EVENT14/PB6 EVENT15/PB7
Port B
SCL2/PC0
SDA2/PC1
SCL3/PC2
SDA3/PC3
SCL4/PC4
SDA4/PC5
PWX2/PC6 PWX3/PC7
Port C
LSCI/PD0
LSMI/PD1
PME/PD2
GA20/PD3
CLKRUN/PD4
LPCPD/PD5
SCL5/PD6
SDA5/PD7
Port D
LAD0/PE0 LAD1/PE1 LAD2/PE2 LAD3/PE3
LFRAME/PE4
LRESET/PE5
LCLK/PE6
SERIRQ/PE7
Port E
ExPW0/PF0 ExPW1/PF1 ExPW2/PF2
Port F
PA0/A16/KIN8/SSE0I/EVENT0
PA1/A17/KIN9/SSE2I/EVENT1
PA2/A18/KIN10/EVENT2
PA3/A19/KIN11/EVENT3
PA4/A20/KIN12/EVENT4
PA5/A21/KIN13/EVENT5
PA6/A22/KIN14/EVENT6
PA7/A23/KIN15/EVENT7
P20/A8/AD8/PW8
P21/A9/AD9/PW9
P22/A10/AD10/PW10
P23/A11/AD11/PW11
P24/A12/AD12/PW12
P25/A13/AD13/PW13
P26/A14/AD14/PW14
P27/A15/AD15/PW15
P10/A0/AD0/PW0
P11/A1/AD1/PW1
P12/A2/AD2/PW2
P13/A3/AD3/PW3
P14/A4/AD4/PW4
P15/A5/AD5/PW5
P16/A6/AD6/PW6
P17/A7/AD7/PW7
P30/D8/WUE8
P31/D9/WUE9
P32/D10/WUE10
P33/D11/WUE11
P34/D12/WUE12
P35/D13/WUE13
P36/D14/WUE14
P37/D15/WUE15
P70/AN0
P71/AN1
P72/ExIRQ2/AN2
P73/ExIRQ3/AN3
P74/ExIRQ4/AN4
P75/ExIRQ5/AN5
P76/ExIRQ6/AN6/DA0
P77/ExIRQ7/AN7/DA1
P80/ExIRQ8/SCL0
P81/ExIRQ9/SDA0
P82/ExIRQ10/SCL1
P83/ExIRQ11/SDA1
P84/ExIRQ12/SCK0/ExTMI0
P85/ExIRQ13/SCK1/ExTMI1
P86/ExIRQ14/SCK2/ExTMIX
P87/ExIRQ15/ADTRG/ExTMIY
D0/KIN0/FTCI/P60
D1/KIN1/FTOA/P61
D2/KIN2/FTIA/P62
D3/KIN3/FTIB/P63
D4/KIN4/FTIC/P64
D5/KIN5/FTID/P65
D6/KIN6/FTOB/P66
D7/KIN7/P67
TMI0/IRQ0/P40
TMI1/IRQ1/P41
TMO0/IRQ2/P42
TMO1/IRQ3/P43
TMIX/IRQ4/P44
TMIY/IRQ5/P45
TMOX/IRQ6/P46
TMOY/IRQ7/P47
TxD0/IRQ8/P50
RxD0/IRQ9/P51
IrTxD/TxD1/IRQ10/P52
IrRxD/RxD1/IRQ11/P53
TxD2/IRQ12/P54
RxD2/IRQ13/P55
PWX0/IRQ14/P56
PWX1/IRQ15/P57
LPC interface
LWR/P90
AH/P91
CPCS1/P92
RD/P93
HWR/P94
IOS/AS/P95
EXCL/φ/P96
CS256/WAIT/P97
XTAL
EXTAL
PFSEL
MD2
MD1
MD0
RES
RESO
STBY
FWE
NMI
ETRST
ETMS
ETDO
ETDI
ETCK
Port 5 Port 4 Port 6 Port 9
Port 8 Port 7 Port 3 Port 1 Port 2 Port A
Sub data bus Sub address bus Peripheral data bus Peripheral address bus
Internal data bus
Internal address bus
Bus controller
Interrupt
controller
14-bit PWM × 4 channels
WDT × 2 channels
8-bit PWM
CRC operation circuit
IIC × 6 channels
10-bit A/D
8-bit D/A
8-bit timer × 4 channels
SCI × 3 channels
(IrDA × 1 channel)
16-bit FRT
Clock pulse
generator
Figure 1.1 Internal Block Diagram