Datasheet

ManualsBrandsRENESAS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller TQFP 144 (16x16) 16-Bit 33 MHz I/O number 106

Rev. 3.00, 03/04, page 312 of 830

Table 12.2 Clock Input to TCNT and Count Condition

TCR STCR

Channel

CKS2 CKS1 CKS0 ICKS1 ICKS0

Description

0 0 0   Disables clock input

0 0 1  0 Increments at falling edge of internal

clock φ/8

0 0 1  1 Increments at falling edge of internal

clock φ/2

0 1 0  0 Increments at falling edge of internal

clock φ/64

0 1 0  1 Increments at falling edge of internal

clock φ/32

0 1 1  0 Increments at falling edge of internal

clock φ/1024

0 1 1  1 Increments at falling edge of internal

clock φ/256

TMR_0

1 0 0   Increments at overflow signal from

TCNT_1*

0 0 0   Disables clock input

0 0 1 0  Increments at falling edge of internal

clock φ/8

0 0 1 1  Increments at falling edge of internal

clock φ/2

0 1 0 0  Increments at falling edge of internal

clock φ/64

0 1 0 1  Increments at falling edge of internal

clock φ/128

0 1 1 0  Increments at falling edge of internal

clock φ/1024

0 1 1 1  Increments at falling edge of internal

clock φ/2048

TMR_1

1 0 0   Increments at compare-match A from

TCNT_0*

0 0 0   Disables clock input TMR_Y

0 0 1   Increments at falling edge of internal

clock φ/4

0 1 0   Increments at falling edge of internal

clock φ/256