Datasheet

Rev. 3.00, 03/04, page 270 of 830
Table 10.3 Settings and Operation (Examples when φ = 33 MHz)
PCSR Fixed DADR Bits
PWCKX0
PWCKX1 Bit Data
C B A
CKS
Reso-
lution
T
(µs) CFS
Base
Cycle
Conver-
sion
Cycle
TL/TH
(OS = 0/OS = 1)
Accuracy
(Bits)
D
A3
D
A2
D
A1
D
A0
Conversion
Cycle (ms)*
   0 0.03 0 1.94 496.48 14 0.50
(µs) (µs) 12 0 0 0.12
/515.6kHz
Always low/high output
DA13 to 0 = H'0000 to H'00FF
(Data value) × T
DA13 to 0 = H'0100 to H'3FFF
10 0 0 0 0 0.03
1 7.76 496.48 14 0.50
(µs) (µs) 12 0 0 0.12
(φ) /128.9kHz
Always low/high output
DA13 to 0 = H'0000 to H'003F
(Data value) × T
DA13 to 0 = H'0040 to H'3FFF
10 0 0 0 0 0.03
0 0 0 1 0.06 0 3.88 0.99 14 0.99
(µs) (ms) 12 0 0 0.25
/257.8kHz
Always low/high output
DA13 to 0 = H'0000 to H'00FF
(Data value) × T
DA13 to 0 = H'0100 to H'3FFF
10 0 0 0 0 0.06
1 15.52 0.99 14 0.99
(µs) (ms) 12 0 0 0.25
(φ/2) /64.5kHz
Always low/high output
DA13 to 0 = H'0000 to H'003F
(Data value) × T
DA13 to 0 = H'0040 to H'3FFF
10 0 0 0 0 0.06
0 0 1 1 1.94 0 124.12 31.78 14 31.78
(µs) (ms) 12 0 0 7.94
/8.1kHz
Always low/high output
DA13 to 0 = H'0000 to H'00FF
(Data value) × T
DA13 to 0 = H'0100 to H'3FFF
10 0 0 0 0 1.99
1 496.48 31.78 14 31.78
(µs) (ms) 12 0 0 7.94
(φ/64) /2.0kHz
Always low/high output
DA13 to 0 = H'0000 to H'003F
(Data value) × T
DA13 to 0 = H'0040 to H'3FFF
10 0 0 0 0 1.99
0 1 0 1 3.88 0 248.24 63.55 14 63.55
(µs) (ms) 12 0 0 15.89
/4.0kHz
Always low/high output
DA13 to 0 = H'0000 to H'00FF
(Data value) × T
DA13 to 0 = H'0100 to H'3FFF
10 0 0 0 0 3.97
1 992.97 63.55 14 63.55
(µs) (ms) 12 0 0 15.89
(φ/128) /1.0kHz
Always low/high output
DA13 to 0 = H'0000 to H'003F
(Data value) × T
DA13 to 0 = H'0040 to H'3FFF
10 0 0 0 0 3.97