Datasheet

Rev. 3.00, 03/04, page 244 of 830
8.14.3 Port E Input Data Register (PEPIN)
PEPIN indicates the pin states of port E.
Bit Bit Name Initial Value R/W Description
7 PE7PIN Undefined* R
6 PE6PIN Undefined* R
5 Pe5PIN Undefined* R
4 PE4PIN Undefined* R
3 PE3PIN Undefined* R
2 PE2PIN Undefined* R
1 PE1PIN Undefined* R
0 PE0PIN Undefined* R
Pin states can be read by performing a read cycle on
this register.
This register is assigned to the same address as that
of PEDDR. When this register is written to, data is
written to PEDDR and the port E setting is then
changed.
Note: The initial value of these pins is determined in accordance with the state of pins PE7 to
PE0.
8.14.4 Pin Functions
Port E also functions as an LPC input/output. The pin function is switched with LPC enabled or
disabled. The LPC module is disabled when the LPC1E, LPC2E, and LPC3E bits in HICR0 of
LPC are all 0.
• PE7/SERIRQ
The pin function is switched as shown below according to the LPC enabled/disabled and the
PE7DDR.
LPC Disabled Enabled
PE7DDR 0 1 
Pin Function PE7 input pin PE7 output pin SERIRQ input/output pin
• PE6/LCLK
The pin function is switched as shown below according to the LPC enabled/disabled and the
PE6DDR.
LPC Disabled Enabled
PE6DDR 0 1 
Pin Function PE6 input pin PE6 output pin LCLK input pin