Datasheet

Rev. 3.00, 03/04, page 238 of 830
• PC0/SCL2
The pin function is switched as shown below according to the combination of the ICE bit of
the IIC_2 ICCR and the PC0DDR.
ICE 0 1
PC0DDR 0 1 
Pin Function PC0 input pin PC0 output pin SCL2 input/output pin
8.13 Port D
Port D is an 8-bit multi-function I/O port that supports the following register set. Port D functions
as both the IIC_5 I/O pin, and the LPC I/O pin. Ports D7 and D6 are NMOS push-pull outputs.
• Port D data direction register (PDDDR)
• Port D output data register (PDODR)
• Port D input data register (PDPIN)
8.13.1 Port D Data Direction Register (PDDDR)
PDDDR is used to specify the input/output attribute of each pin of port D.
Bit Bit Name Initial Value R/W Description
7 PD7DDR 0 W
6 PD6DDR 0 W
5 PD5DDR 0 W
4 PD4DDR 0 W
3 PD3DDR 0 W
2 PD2DDR 0 W
1 PD1DDR 0 W
0 PD0DDR 0 W
When the general input/output port function is
selected, and the given bit is set to 1, the
corresponding pin will function as an output port, and
when the bit is cleared to 0, the pin will function as an
input port.
This register is assigned to the same address as that
of PDPIN. When this address is read, the port D
states are returned.