Datasheet

Rev. 3.00, 03/04, page 226 of 830
8.10 Port A
Port A is an 8-bit I/O port. Port A pins also function as the address output, event counter input,
keyboard input, and SCI_0 and SCI_2 external control pins. Pin functions are switched depending
on the operating mode. Port A has the following registers. PADDR and PAPIN have the same
address.
• Port A data direction register (PADDR)
• Port A output data register (PAODR)
• Port A input data register (PAPIN)
8.10.1 Port A Data Direction Register (PADDR)
The individual bits of PADDR specify input or output for the pins of port A.
Bit Bit Name Initial Value R/W Description
7 PA7DDR 0 W
6 PA6DDR 0 W
5 PA5DDR 0 W
4 PA4DDR 0 W
3 PA3DDR 0 W
2 PA2DDR 0 W
1 PA1DDR 0 W
0 PA0DDR 0 W
In normal extended mode:
The corresponding port A pins are address output
ports when the PADDR bits are set to 1, and input
ports when cleared to 0. Pins function as the address
output port depending on the setting of bits IOSE,
CS256E, CPCSE, ADFULLE in bus controller.
In other mode:
The corresponding port A pins are output ports when
the PADDR bits are set to 1, and input ports when
cleared to 0.