Datasheet

Rev. 3.00, 03/04, page 181 of 830
Table 8.1 Port Functions (cont)
Port Description
Extended Mode
(EXPE = 1)
Single-Chip Mode
(EXPE = 0) I/O Status
PA7/KIN15/
A23/EVENT7
PA7/KIN15/
EVENT7
PA6/KIN14/
A22/EVENT6
PA6/KIN14/
EVENT6
PA5/KIN13/
A21/EVENT5
PA5/KIN13/
EVENT5
PA4/KIN12/
A20/EVENT4
PA4/KIN12/
EVENT4
PA3/KIN11/
A19/EVENT3
PA3/KIN11/
EVENT3
PA2/KIN10/
A18/EVENT2
PA2/KIN10/
EVENT2
PA1/KIN9/
A17/SSE2I/
EVENT1
PA1/KIN9/
SSE2I/
EVENT1
Port A General I/O port
also functioning
as DTC event
counter input,
address output,
keyboard input,
and SCI_0 and
SCI_2 external
control pins
PA0/KIN8/
A16/SSE0I/
EVENT0
PA0/KIN8/
SSE0I/
EVENT0
Built-in input
pull-up
MOSs
Port B General I/O port
also functioning
as DTC event
counter input
PB7/EVENT15
PB6/EVENT14
PB5/EVENT13
PB4/EVENT12
PB3/EVENT11
PB2/EVENT10
PB1/EVENT9
PB0/EVENT8
Port C General I/O port
also functioning
as PWMX output
and IIC_2, IIC_3,
and IIC_4 I/O
pins
PC7/PWX3
PC6/PWX2
PC5/SDA4
PC4/SCL4
PC3/SDA3
PC2/SCL3
PC1/SDA2
PC0/SCL2
NMOS push-
pull outputs
(PC0 to
PC5)
Port D General I/O port
also functioning
as LPC I/O, and
IIC_5 I/O pins
PD7/SDA5
PD6/SCL5
PD5/LPCPD
PD4/CLKRUN
PD3/GA20
PD2/PME
PD1/LSMI
PD0/LSCI
Built-in input
pull-up
MOSs
(PD0 to
PD5)
NMOS push-
pull outputs
(PD6 to
PD7)