Rev. 3.00, 03/04, page 144 of 830
Read Cycle
Data Data
Write Cycle
T
5
T
DSW
T
DOW
T
DOW
T
3
T
4
T
5
T
DSW
T
DOW
T
DOW
T
3
T
4
CPCS1
CS256
IOS
WAIT
AH
RD
HWR
LWR
AD7 to AD0
Data
Data
AD15 to AD8
φ
Data
Data
Figure 6.26 Example of Wait State Insertion Timing
