Datasheet

Rev. 3.00, 03/04, page 114 of 830
Table 6.3 Bit Settings and Bus Specifications of Basic Bus Interface
Areas
BRSTRM
CS256E
CPCSE
Basic Extended
Area
256-kbyte
Extended Area
CP Extended Area (Basic
Mode)
0 Used as basic extended
area
0
1
Used as basic
extended area
ABWCP, ASTCP, WMS21,
WMS20, WC21, WC20
0
0
1
1
Basic extended
area
ABW, AST,
WMS1, WMS0,
WC1, WC0
ABW256, AST256,
WMS10, WC11,
WC10
Same as when CS256E = 0
0 Used as burst ROM
interface
0
1
Used as burst
ROM interface
ABWCP, ASTCP, WMS21,
WMS20, WC21, WC20
0
1
1
1
Burst ROM
interface*
ABW, AST,
WMS0, WC1,
WC0, BRSTS1,
BRSTS0
ABW256, AST256,
WMS10, WC11,
WC10
Same as when CS256E = 0
Note: * In the burst ROM interface, the bus width is specified by the ABW bit in WSCR, the
number of full access states (wait can be inserted) is specified by the AST bit in WSCR,
and the number of access cycles in burst access is specified regardless of the AST bit
setting.