Datasheet

Rev. 3.00, 03/04, page 80 of 830
5.3.6 IRQ Status Registers (ISR16, ISR)
The ISR registers are flag registers that indicate the status of IRQ15 to IRQ0 interrupt requests.
• ISR16
Bit Bit Name Initial Value R/W Description
7 to 0 IRQ15F to
IRQ8F
All 0 R/W [Setting condition]
• When the interrupt source selected by the
ISCR16 registers occurs
[Clearing conditions]
• When reading IRQnF flag when IRQnF = 1,
then writing 0 to IRQnF flag
• When interrupt exception handling is
executed when low-level detection is set
and IRQn or ExIRQn input is high
• When IRQn interrupt exception handling is
executed when falling-edge, rising-edge, or
both-edge detection is set
(n = 15 to 8)
• ISR
Bit Bit Name Initial Value R/W Description
7 to 0 IRQ7F to
IRQ0F
All 0 R/W [Setting condition]
• When the interrupt source selected by the
ISCR registers occurs
[Clearing conditions]
• When reading IRQnF flag when IRQnF = 1,
then writing 0 to IRQnF flag
• When interrupt exception handling is
executed when low-level detection is set
and IRQn or ExIRQn* input is high
• When IRQn interrupt exception handling is
executed when falling-edge, rising-edge, or
both-edge detection is set
(n = 7 to 0)
Note: * ExIRQn stands for ExIRQ7 to ExIRQ2.