Datasheet

Rev. 3.00, 03/04, page 74 of 830
5.3 Register Descriptions
The interrupt controller has the following registers. For details on the system control register
(SYSCR), see section 3.2.2, System Control Register (SYSCR), and for details on the IRQ sense
port select registers (ISSR16, ISSR), see section 8.16.1, IRQ Sense Port Select Register 16
(ISSR16), IRQ Sense Port Select Register (ISSR).
• Interrupt control registers A to D (ICRA to ICRD)
• Address break control register (ABRKCR)
• Break address registers A to C (BARA to BARC)
• IRQ sense control registers (ISCR16H, ISCR16L, ISCRH, ISCRL)
• IRQ enable registers (IER16, IER)
• IRQ status registers (ISR16, ISR)
• Keyboard matrix interrupt mask registers (KMIMRA, KMIMR6)
• Wake-up event interrupt mask register (WUEMR3)
5.3.1 Interrupt Control Registers A to D (ICRA to ICRD)
The ICR registers set interrupt control levels for interrupts other than NMI.
The correspondence between interrupt sources and ICRA to ICRD settings is shown in table 5.2.
Bit Bit Name Initial Value R/W Description
7 to 0 ICRn7 to IRCn0 All 0 R/W Interrupt Control Level
0: Corresponding interrupt source is interrupt
control level 0 (no priority)
1: Corresponding interrupt source is interrupt
control level 1 (priority)
[Legend]
n: A to D