Datasheet

Rev. 3.00, 03/04, page 72 of 830
SYSCR
NMI input
IRQ input
KIN input
WUE input
Internal interrupt sources
SWDTEND to IBFI3
NMIEG
INTM1, INTM0
NMI input
IRQ input
ISR
KIN, WUE
input
ISCR IER
KMIMR
WUEMR
ICR
Interrupt controller
Priority level
determination
Interrupt
request
Vector number
I, UI
CCR
CPU
ICR:
ISCR:
IER:
ISR:
KMIMR:
WUEMR:
SYSCR:
Interrupt control register
IRQ sense control register
IRQ enable register
IRQ status register
Keyboard matrix interrupt mask register
Wake-up event interrupt mask register
System control register
[Legend]
Figure 5.1 Block Diagram of Interrupt Controller