Datasheet

Section 27 Electrical Characteristics
Rev. 3.00 Mar 21, 2006 page 715 of 788
REJ09B0300-0300
Timing of On-Chip Peripheral Modules: Tables 27.8 to 27.11 show the on-chip peripheral
module timing. The only on-chip peripheral modules that can operate in subclock operation (φ =
32.768 kHz) are the I/O ports, external interrupts (NMI and IRQ0 to 2, 6, and 7), the watchdog
timer, and the 8-bit timer (channels 0 and 1).
Table 27.8 Timing of On-Chip Peripheral Modules (1)
Conditions: V
CC
= 2.7 V to 3.6 V, V
CC
B = 2.7 V to 5.5 V, V
SS
= 0 V, φ = 32.768 kHz
*
,
2 MHz to maximum operating frequency, T
a
= –20 to +75°C
Condition
10 MHz
Item Symbol Min Max Unit Test Conditions
Output data delay time t
PWD
— 100
Input data setup time t
PRS
50 —
I/O ports
Input data hold time t
PRH
50 —
ns Figure 27.16
FRT Timer output delay time t
FTOD
— 100
Timer input setup time t
FTIS
50 —
Figure 27.17
Timer clock input setup time t
FTCS
50 —
ns
Timer clock pulse width
Single edge t
FTCWH
1.5 —
Both edges t
FTCWL
2.5 —
t
cyc
Figure 27.18
TMR Timer output delay time t
TMOD
— 100 Figure 27.19
Timer reset input setup time t
TMRS
50 — Figure 27.21
Timer clock input setup time t
TMCS
50 —
ns
Single edge t
TMCWH
1.5 —
Timer clock
pulse width
Both edges t
TMCWL
2.5 —
t
cyc
Figure 27.20
PWM,
PWMX
Pulse output delay time t
PWOD
— 100 ns Figure 27.22
Asynchronous t
Scyc
4 —
Input clock
cycle
Synchronous 6 —
t
cyc
Input clock pulse width t
SCKW
0.4 0.6 t
Scyc
SCI
Input clock rise time t
SCKr
— 1.5
Input clock fall time t
SCKf
— 1.5
t
cyc
Figure 27.23