Datasheet

Section 19 Host Interface LPC Interface (LPC)
Rev. 3.00 Mar 21, 2006 page 558 of 788
REJ09B0300-0300
R/W
Bit Bit Name Initial Value Slave Host Description
4 IRQ6E3 0 R/W — Host IRQ6 Interrupt Enable 3
Enables or disables a host IRQ6 interrupt request
when OBF3A is set by an ODR3 write.
0: Host IRQ6 interrupt request by OBF3A and
IRQ6E3 is disabled
[Clearing conditions]
• Writing 0 to IRQ6E3
• LPC hardware reset, LPC software reset
• Clearing OBF3A to 0 (when IEDIR = 0)
1: [When IEDIR = 0]
Host IRQ6 interrupt request by setting OBF3A to
1 is enabled
[When IEDIR = 1]
Host IRQ6 interrupt is requested.
[Setting condition]
Writing 1 after reading IRQ6E3 = 0
3 IRQ11E2 0 R/W — Host IRQ11 Interrupt Enable 2
Enables or disables a host IRQ11 interrupt request
when OBF2 is set by an ODR2 write.
0: Host IRQ11 interrupt request by OBF2 and
IRQ11E2 is disabled
[Clearing conditions]
• Writing 0 to IRQ11E2
• LPC hardware reset, LPC software reset
• Clearing OBF2 to 0 (when IEDIR = 0)
1: [When IEDIR = 0]
Host IRQ11 interrupt request by setting OBF2 to
1 is enabled
[When IEDIR = 1]
Host IRQ11 interrupt is requested.
[Setting condition]
Writing 1 after reading IRQ11E2 = 0