Datasheet

Section 18 Host Interface X-Bus Interface (XBS)
Rev. 3.00 Mar 21, 2006 page 520 of 788
REJ09B0300-0300
Table 18.3 shows HIF host interface channel selection and pin operation.
Table 18.3 Host Interface Channel Selection and Pin Operation
HI12E CS2E CS3E CS4E Operation
0 Host interface functions halted
0 Host interface channel 1 only operating
Operation of channels 2 to 4 halted
Pins P43, P81, P90, and PB0 to PB3 operate as I/O ports. CS2
or ECS2, CS3, and CS4 inputs do not operate.
0
1 Host interface channel 1 and 4 functions operating
Operation of channels 2 and 3 halted
Pins P43, P81, P90, PB0, and PB2 operate as I/O ports. CS2
or ECS2 and CS3 inputs do not operate.
0 Host interface channel 1 and 3 functions operating
Operation of channels 2 and 4 halted
Pins P43, P81, P90, PB1, and PB3 operate as I/O ports. CS2
or ECS2 and CS4 inputs do not operate.
0
1
1 Host interface channel 1, 3, and 4 functions operating
Operation of channel 2 halted
Pins P43, P81, and P90 operate as I/O ports. CS2 or ECS2
input does not operate.
0 Host interface channel 1 and 2 functions operating
Operation of channels 3 and 4 halted
Pins PB0 to PB3 operate as I/O ports. CS3 and CS4 inputs do
not operate.
0
1 Host interface channel 1, 2, and 4 functions operating
Operation of channel 3 halted
Pins PB0 and PB2 operate as I/O ports. CS3 input does not
operate.
0 Host interface channel 1 to 3 functions operating
Operation of channel 4 halted
Pins PB1 and PB3 operate as I/O ports. CS4 input does not
operate.
1
1
1
1 Host interface channel 1 to 4 functions operating