Datasheet

Section 17 Keyboard Buffer Controller
Rev. 3.00 Mar 21, 2006 page 495 of 788
REJ09B0300-0300
Bit Bit Name Initial Value R/W Description
3
2
1
0
RXCR3
RXCR2
RXCR1
RXCR0
0
0
0
0
R
R
R
R
Receive Counter
These bits indicate the received data bit. Their value
is incremented on the fall of KCLK. These bits cannot
be modified.
The receive counter is initialized to 0000 by a reset
and when 0 is written in KBE. Its value returns to 0000
after a stop bit is received.
0000: —
0001: Start bit
0010: KB0
0011: KB1
0100: KB2
0101: KB3
0110: KB4
0111: KB5
1000: KB6
1001: KB7
1010: Parity bit
1011: —
11- - : —
17.3.3 Keyboard Data Buffer Register (KBBR)
KBBR stores receive data. Its value is valid only when KBF = 1.
Bit Bit Name Initial Value R/W Description
7
6
5
4
3
2
1
0
KB7
KB6
KB5
KB4
KB3
KB2
KB1
KB0
0
0
0
0
0
0
0
0
R
R
R
R
R
R
R
R
Keyboard Data 7 to 0
8-bit read only data.
Initialized to H'00 by a reset, in standby mode, watch
mode, subactive mode, subsleep mode, and module
stop mode, and when KBIOE is cleared to 0.