Datasheet
Rev. 3.00 Mar 21, 2006 page lii of liv
Section 20 D/A Converter
Table 20.1 Pin Configuration................................................................................................... 580
Table 20.2 D/A Channel Enable............................................................................................... 582
Section 21 A/D Converter
Table 21.1 Pin Configuration................................................................................................... 587
Table 21.2 Analog Input Channels and Corresponding ADDR Registers................................ 588
Table 21.3 A/D Conversion Time (Single Mode).................................................................... 595
Section 23 ROM
Table 23.1 Differences between Boot Mode and User Program Mode.................................... 605
Table 23.2 Pin Configuration................................................................................................... 611
Table 23.3 Operating Modes and ROM ................................................................................... 617
Table 23.4 On-Board Programming Mode Settings................................................................. 618
Table 23.5 Boot Mode Operation............................................................................................. 620
Table 23.6 System Clock Frequencies for which Automatic Adjustment of LSI Bit Rate
Is Possible............................................................................................................... 621
Section 24 Clock Pulse Generator
Table 24.1 Damping Resistance Values................................................................................... 634
Table 24.2 Crystal Resonator Parameters ................................................................................ 635
Table 24.3 External Clock Input Conditions............................................................................ 636
Table 24.4 External Clock Output Stabilization Delay Time................................................... 637
Table 24.5 Subclock Input Conditions..................................................................................... 638
Section 25 Power-Down Modes
Table 25.1 Operating Frequency and Wait Time ..................................................................... 643
Table 25.2 LSI Internal States in Each Mode........................................................................... 648
Section 27 Electrical Characteristics
Table 27.1 Absolute Maximum Ratings................................................................................... 701
Table 27.2 DC Characteristics (1)............................................................................................ 702
Table 27.2 DC Characteristics (2)............................................................................................ 705
Table 27.2 DC Characteristics (3) When LPC Function Is Used............................................. 707
Table 27.3 Permissible Output Currents .................................................................................. 708
Table 27.4 Bus Drive Characteristics....................................................................................... 709
Table 27.5 Clock Timing ......................................................................................................... 711
Table 27.6 Control Signal Timing............................................................................................ 712
Table 27.7 Bus Timing (1) (Normal Mode)............................................................................. 713
Table 27.7 Bus Timing (2) (Advanced Mode) ......................................................................... 714
Table 27.8 Timing of On-Chip Peripheral Modules (1)........................................................... 715