Datasheet

Section 8 I/O Ports
Rev. 3.00 Mar 21, 2006 page 211 of 788
REJ09B0300-0300
8.12 Port B
Port B is an 8-bit I/O port. Port B pins also have XBS input/output pins, LPC input/output pins,
wakeup event interrupt input pins, and a data bus input/output function. The pin functions depend
on the operating mode. Port B has the following registers.
• Port B data direction register (PBDDR)
• Port B output data register (PBODR)
• Port B input data register (PBPIN)
8.12.1 Port B Data Direction Register (PBDDR)
PBDDR specifies input or output for the pins of port B on a bit-by-bit basis.
Bit Bit Name Initial Value R/W Description
7 PB7DDR 0 W
6 PB6DDR 0 W
5 PB5DDR 0 W
4 PB4DDR 0 W
3 PB3DDR 0 W
2 PB2DDR 0 W
1 PB1DDR 0 W
0 PB0DDR 0 W
PBDDR has the same address as P7PIN, and if
read, the port 7 pin states will be returned.
• Modes 1, 2, and 3 (EXPE = 1)
When the ABW bit in WSCR is cleared to 0,
port B pins automatically become data I/O
pins (D7 to D0), regardless of the input/output
direction indicated by PBDDR. When the
ABW bit is 1, a port B pin becomes an output
port if the corresponding PBDDR bit is set to
1, and an input port if the bit is cleared to 0.
• Modes 2 and 3 (EXPE = 0)
A port B pin becomes an output port if the
corresponding PBDDR bit is set to 1, and an
input port if the bit is cleared to 0.