Datasheet

Section 8 I/O Ports
Rev. 3.00 Mar 21, 2006 page 185 of 788
REJ09B0300-0300
• P42/TMRI0/SCK2/SDA1
The pin function is switched as shown below according to the combination of the ICE bit in
ICCR of IIC1, the CKE1 and CKE0 bits in SCR of SCI_2, the C/A bit in SMR of SCI_2, and
the P42DDR bit.
ICE 0 1
CKE1 0 1 0
C/A 01—0
CKE0 0 1 — — 0
P42DDR 0 1 ————
P42 input
pin
P42 output
pin
SCK2
output pin
SCK2
output pin
SCK2 input
pin
SDA1
I/O pin
Pin Function
TMRI0 input pin
*
Note: * When this pin is used as the SDA1 I/O pin, bits CKE1 and CKE0 in SCR of SCI_2 and
bit C/A in SMR of SCI_2 must all be cleared to 0. SDA1 is an NMOS-only output, and
has direct bus drive capability.
When bits CCLR1 and CCLR0 in TCR0 of TMR_0 are set to 1, this pin is used as the
TMRI0 input pin.
When the P42 output pin and SCK2 output pin are set, the output type is NMOS push-
pull output.
• P41/TMO0/RxD2/IrRxD
The pin function is switched as shown below according to the combination of the OS3 to OS0
bits in TCSR of TMR0, the RE bit in SCR of SCI_2 and the P41DDR bit.
OS3 to OS0 All 0 Not all 0
RE 0 1 0
P41DDR 0 1 — —
Pin Function P41
input pin
P41
output pin
RxD2/IrRxD
input pin
TMO0
output pin
Note: When this pin is used as the TMO0 output pin, bit RE in SCR of SCI_2 must be cleared to
0.