Datasheet

Section 8 I/O Ports
Rev. 3.00 Mar 21, 2006 page 180 of 788
REJ09B0300-0300
8.4.2 Port 3 Data Register (P3DR)
P3DR stores output data of port 3.
Bit Bit Name Initial Value R/W Description
7 P37DR 0 R/W
6 P36DR 0 R/W
5 P35DR 0 R/W
4 P34DR 0 R/W
3 P33DR 0 R/W
2 P32DR 0 R/W
1 P31DR 0 R/W
0 P30DR 0 R/W
If a port 3 read is performed while P3DDR bits are
set to 1, the P3DR values are read directly,
regardless of the actual pin states. If a port 3 read
is performed while P3DDR bits are cleared to 0,
the pin states are read.
8.4.3 Port 3 Pull-Up MOS Control Register (P3PCR)
P3PCR controls the port 3 on-chip input pull-up MOSs on a bit-by-bit basis.
Bit Bit Name Initial Value R/W Description
7 P37PCR 0 R/W
6 P36PCR 0 R/W
5 P35PCR 0 R/W
4 P34PCR 0 R/W
3 P33PCR 0 R/W
2 P32PCR 0 R/W
1 P31PCR 0 R/W
0 P30PCR 0 R/W
In modes 2 and 3 (when EXPE = 0), the input pull-
up MOS is turned on when a P3PCR bit is set to 1
in the input port state.
The input pull-up MOS function cannot be used
when the host interface is enabled.