Datasheet

Section 6 Bus Controller (BSC)
Rev. 3.00 Mar 21, 2006 page 139 of 788
REJ09B0300-0300
6.5.4 Wait Control
When accessing the external address space, this LSI can extend the bus cycle by inserting one or
more wait states (T
W
). There are three ways of inserting wait states: Program wait insertion, pin
wait insertion using the WAIT pin, and the combination of program wait and the WAIT pin.
Program Wait Mode: A specified number of wait states T
W
can be inserted automatically
between the T
2
state and T
3
state when accessing the external address space always according to
the settings of the WC1 and WC0 bits in WSCR.
Pin Wait Mode: A specified number of wait states T
W
can be inserted automatically between the
T
2
state and T
3
state when accessing the external address space always according to the settings of
the WC1 and WC0 bits. If the WAIT pin is low at the falling edge of φ in the last T
2
or T
W
state,
another T
W
state is inserted. If the WAIT pin is held low, T
W
states are inserted until it goes high.
This is useful when inserting four or more T
W
states, or when changing the number of T
W
states to
be inserted for each external device.
Pin Auto-Wait Mode: A specified number of wait states T
W
can be inserted automatically
between the T
2
state and T
3
state when accessing the external address space according to the
settings of the WC1 and WC0 bits if the WAIT pin is low at the falling edge of φ in the last T
2
state. Even if the WAIT pin is held low, T
W
states can be inserted only up to the specified number
of states.
This function enables the low-speed memory interface only by inputting the chip select signal to
the WAIT pin.
Figure 6.13 shows an example of wait state insertion timing in pin wait mode.
The settings after a reset are: 3-state access, 3 program wait insertion, and WAIT pin input
disabled.