Datasheet

Section 6 Bus Controller (BSC)
Rev. 3.00 Mar 21, 2006 page 125 of 788
REJ09B0300-0300
6.3.2 Wait State Control Register (WSCR)
WSCR is used to specify the data bus width for external address space access, the number of
access states, the wait mode, and the number of wait states for access to external address spaces.
The bus width and the number of access states for internal memory and internal I/O registers are
fixed regardless of the WSCR settings.
Bit Bit Name Initial Value R/W Description
7, 6 — All 0 R/W Reserved
These bits should not be written by 1.
5 ABW 1 R/W Bus Width Control
Selects 8 or 16 bits for access to the external address
space.
0: 16-bit access space
1: 8-bit access space
4 AST 1 R/W Access State Control
Selects 2 or 3 access states for access to the external
address space. This bit also enables or disables wait-
state insertion.
0: 2-state access space. Wait state insertion disabled
in external address space access
1: 3-state access space. Wait state insertion enabled
in external address space access
3
2
WMS1
WMS0
0
0
R/W
R/W
Wait Mode Select 1, 0
Select the wait mode for access to the external
address space when the AST bit is set to 1.
00: Program wait mode
01: Wait disabled mode
10: Pin wait mode
11: Pin auto-wait mode