Datasheet

Section 5 Interrupt Controller
Rev. 3.00 Mar 21, 2006 page 115 of 788
REJ09B0300-0300
5.7 Address Break
5.7.1 Features
This LSI can determine the specific address prefetch by the CPU to generate an address break
interrupt by setting ABRKCR and BAR. If an address break interrupt is generated, the address
break interrupt exception handling is performed.
With this function, the execution start point of a program containing a bug is detected and
execution is branched to the correcting program.
5.7.2 Block Diagram
Figure 5.9 shows a block diagram of the address break.
ABRKCRBAR
Control
logic
Comparator
Match
signal
Address break
interrupt request
Internal address
Prefetch signal
(internal signal)
Figure 5.9 Address Break Block Diagram