Datasheet

Section 26 List of Registers
Rev. 3.00 Mar 21, 2006 page 681 of 788
REJ09B0300-0300
Register
Abbrevia-
tion Reset
High-
Speed/
Medium-
Speed Watch Sleep
Sub-
Active
Sub-
Sleep
Module
Stop
Software
Standby
Hardware
Standby Module
STR1 Initialized — — — — — — — Initialized
IDR2—————————
ODR2—————————
STR2 Initialized — — — — — — — Initialized
HISEL Initialized — — — — — — — Initialized
HICR0 Initialized — — — — — — — Initialized
HICR1 Initialized — — — — — — — Initialized
HICR2 Initialized — — — — — — — Initialized
HICR3—————————
LPC
WUEMRB
*
2
Initialized — — — — — — — Initialized INT
PGODR
*
1
Initialized — — — — — — — Initialized
PGPIN
*
1
—————————
PGDDR
*
1
Initialized — — — — — — — Initialized
PEODR
*
1
Initialized — — — — — — — Initialized
PFODR
*
1
Initialized — — — — — — — Initialized
PEPIN
*
1
—————————
PEDDR
*
1
Initialized — — — — — — — Initialized
PFPIN
*
1
—————————
PFDDR
*
1
Initialized — — — — — — — Initialized
PCODR
*
1
Initialized — — — — — — — Initialized
PDODR
*
1
Initialized — — — — — — — Initialized
PCPIN
*
1
—————————
PCDDR
*
1
Initialized — — — — — — — Initialized
PDPIN
*
1
—————————
PDDDR
*
1
Initialized — — — — — — — Initialized
PORT
HICR2 Initialized — — — — — — — Initialized
IDR_3—————————
ODR_3—————————
STR_3 Initialized — — — — — — — Initialized
IDR_4————————Initialized
ODR_4————————Initialized
STR_4 Initialized — — — — — — — Initialized
XBS