Datasheet

Section 26 List of Registers
Rev. 3.00 Mar 21, 2006 page 660 of 788
REJ09B0300-0300
26.1 Register Addresses (Address Order)
The data bus width indicates the numbers of bits by which the register is accessed.
The number of access states indicates the number of states based on the specified reference clock.
Register Name Abbreviation
Number
of Bits Address Module
Data
Bus
Width
Number
of
Access
States
Port G open drain control register PGNOCR
*
1
8H'FE16PORT83
Port E open drain control register PENOCR
*
1
8H'FE18PORT83
Port F open drain control register PFNOCR
*
1
8H'FE19PORT83
Port C open drain control register PCNOCR
*
1
8H'FE1CPORT83
Port D open drain control register PDNOCR
*
1
8H'FE1DPORT83
Bidirectional data register 0MW TWR0MW 8 H'FE20 LPC 8 3
Bidirectional data register 0SW TWR0SW 8 H'FE20 LPC 8 3
Bidirectional data register 1 TWR1 8 H'FE21 LPC 8 3
Bidirectional data register 2 TWR2 8 H'FE22 LPC 8 3
Bidirectional data register 3 TWR3 8 H'FE23 LPC 8 3
Bidirectional data register 4 TWR4 8 H'FE24 LPC 8 3
Bidirectional data register 5 TWR5 8 H'FE25 LPC 8 3
Bidirectional data register 6 TWR6 8 H'FE26 LPC 8 3
Bidirectional data register 7 TWR7 8 H'FE27 LPC 8 3
Bidirectional data register 8 TWR8 8 H'FE28 LPC 8 3
Bidirectional data register 9 TWR9 8 H'FE29 LPC 8 3
Bidirectional data register 10 TWR10 8 H'FE2A LPC 8 3
Bidirectional data register 11 TWR11 8 H'FE2B LPC 8 3
Bidirectional data register 12 TWR12 8 H'FE2C LPC 8 3
Bidirectional data register 13 TWR13 8 H'FE2D LPC 8 3
Bidirectional data register 14 TWR14 8 H'FE2E LPC 8 3
Bidirectional data register 15 TWR15 8 H'FE2F LPC 8 3
Input data register 3 IDR3 8 H'FE30 LPC 8 3
Output data register 3 ODR3 8 H'FE31 LPC 8 3
Status register 3 STR3 8 H'FE32 LPC 8 3