Datasheet

Section 17 Keyboard Buffer Controller
Rev. 3.00 Mar 21, 2006 page 505 of 788
REJ09B0300-0300
17.4.6 KBF Setting Timing and KCLK Control
Figure 17.11 shows the KBF setting timing and the KCLK pin states.
KCLK
(pin)
φ*
Internal
KCLK
Falling edge
signal
RXCR3 to
RXCR0
KCLK
(output)
KBF
11th fall
Automatic I/O inhibit
B'0000B'1010
Note: * The φ clock shown here is scaled by 1/N in medium-speed mode when the operating
mode is active mode.
Figure 17.11 KBF Setting and KCLK Automatic I/O Inhibit Generation Timing