Datasheet

Section 17 Keyboard Buffer Controller
Rev. 3.00 Mar 21, 2006 page 494 of 788
REJ09B0300-0300
17.3.2 Keyboard Control Register L (KBCRL)
KBCRL enables the receive counter count and controls the keyboard buffer controller pin output.
Bit Bit Name Initial Value R/W Description
7 KBE 0 R/W Keyboard Enable
Enables or disables loading of receive data into
KBBR.
0: Loading of receive data into KBBR is disabled
1: Loading of receive data into KBBR is enabled
6 KCLKO 1 R/W Keyboard Clock Out
Controls KBC clock I/O pin output.
0: KBC clock I/O pin is low
1: KBC clock I/O pin is high
5 KDO 1 R/W Keyboard Data Out
Controls KBC data I/O pin output.
0: KBC data I/O pin is low
1: KBC data I/O pin is high
4— 1 — Reserved
This bit is always read as 1 and cannot be modified.