Datasheet

Rev. 3.00 Mar 21, 2006 page xlviii of liv
Tables
Section 1 Overview
Table 1.1 Pin Functions of H8S/2140B, H8S/2141B, H8S/2145B, and H8S/2148B
in Each Operating Mode ........................................................................................ 7
Table 1.2 Pin Functions of H8S/2160B and H8S/2161B in Each Operating Mode............... 12
Table 1.3 Pin Functions..........................................................................................................18
Section 2 CPU
Table 2.1 Instruction Classification........................................................................................ 40
Table 2.2 Operation Notation................................................................................................. 41
Table 2.3 Data Transfer Instructions...................................................................................... 42
Table 2.4 Arithmetic Operations Instructions (1)................................................................... 43
Table 2.4 Arithmetic Operations Instructions (2)................................................................... 44
Table 2.5 Logic Operations Instructions ................................................................................ 45
Table 2.6 Shift Instructions.................................................................................................... 45
Table 2.7 Bit Manipulation Instructions (1)........................................................................... 46
Table 2.7 Bit Manipulation Instructions (2)........................................................................... 47
Table 2.8 Branch Instructions ................................................................................................ 48
Table 2.9 System Control Instructions................................................................................... 49
Table 2.10 Block Data Transfer Instructions ........................................................................... 50
Table 2.11 Addressing Modes.................................................................................................. 52
Table 2.12 Absolute Address Access Ranges .......................................................................... 53
Table 2.13 Effective Address Calculation (1) .......................................................................... 55
Table 2.13 Effective Address Calculation (2) .......................................................................... 56
Section 3 MCU Operating Modes
Table 3.1 MCU Operating Mode Selection............................................................................ 63
Table 3.2 Pin Functions in Each Mode .................................................................................. 70
Section 4 Exception Handling
Table 4.1 Exception Types and Priority................................................................................. 81
Table 4.2 Exception Handling Vector Table.......................................................................... 82
Table 4.3 Status of CCR after Trap Instruction Exception Handling..................................... 85
Section 5 Interrupt Controller
Table 5.1 Pin Configuration................................................................................................... 91
Table 5.2 Correspondence between Interrupt Source and ICR .............................................. 92
Table 5.3 Interrupt Sources, Vector Addresses, and Interrupt Priorities................................ 103
Table 5.4 Interrupt Control Modes......................................................................................... 105