Datasheet

Section 13 Timer Connection
Rev. 3.00 Mar 21, 2006 page 337 of 788
REJ09B0300-0300
Table 13.8 Examples of TCR, TCSR, and TCORB Settings
Register Bit Abbreviation Contents Description
7CMIEB 0
6CMIEA 0
5OVIE 0
Interrupts due to compare-match and
overflow are disabled
4 and 3 CCLR1 and
CCLR0
11 TCNT is cleared by the rising edge of the
external reset signal (inverse of the IVI
signal)
TCR in
TMR_1
2 to 0 CKS2 to CKS0 101 TCNT is incremented on the rising edge
of the external clock (IHI signal)
0011 Not changed by compare-match B;
output inverted by compare-match A
(toggle output)
TCSR in
TMR_1
3 to 0 OS3 to OS0
1001 When TCORB < TCORA, 1 output on
compare-match B, 0 output on compare-
match A
TCORB in TMR_1 H'03
(example)
Compare-match on the 4th (example)
rise of the IHI signal after the rise of the
inverse of the IVI signal
0
1
2
3
4
5
TCNT
TCNT = TCORB (3)
IHI signal
IVI signal (PDC signal)
IVO signal
(without fall modification,
with IHI synchronization)
IVO signal
(with fall modification,
without IHI synchronization)
IVO signal
(with fall modification
and IHI synchronization)
Figure 13.7 Fall Modification and IHI Synchronization Timing Chart