Datasheet

Rev. 3.00 Mar 21, 2006 page xxx of liv
14.4 Operation .......................................................................................................................... 352
14.4.1 Watchdog Timer Mode........................................................................................ 352
14.4.2 Interval Timer Mode............................................................................................ 354
14.4.3 RESO Signal Output Timing ............................................................................... 355
14.5 Interrupt Sources............................................................................................................... 355
14.6 Usage Notes ...................................................................................................................... 356
14.6.1 Notes on Register Access..................................................................................... 356
14.6.2 Conflict between Timer Counter (TCNT) Write and Increment.......................... 357
14.6.3 Changing Values of CKS2 to CKS0 Bits............................................................. 357
14.6.4 Switching between Watchdog Timer Mode and Interval Timer Mode................ 357
14.6.5 System Reset by RESO Signal............................................................................. 358
14.6.6 Counter Values during Transitions between High-Speed, Sub-Active,
and Watch Modes ................................................................................................ 358
Section 15 Serial Communication Interface (SCI and IrDA)................................. 359
15.1 Features............................................................................................................................. 359
15.2 Input/Output Pins.............................................................................................................. 361
15.3 Register Descriptions........................................................................................................ 361
15.3.1 Receive Shift Register (RSR) .............................................................................. 362
15.3.2 Receive Data Register (RDR).............................................................................. 362
15.3.3 Transmit Data Register (TDR)............................................................................. 362
15.3.4 Transmit Shift Register (TSR)............................................................................. 362
15.3.5 Serial Mode Register (SMR)................................................................................ 363
15.3.6 Serial Control Register (SCR).............................................................................. 364
15.3.7 Serial Status Register (SSR) ................................................................................ 366
15.3.8 Serial Interface Mode Register (SCMR).............................................................. 368
15.3.9 Bit Rate Register (BRR) ...................................................................................... 369
15.3.10 Keyboard Comparator Control Register (KBCOMP).......................................... 375
15.4 Operation in Asynchronous Mode .................................................................................... 376
15.4.1 Data Transfer Format........................................................................................... 377
15.4.2 Receive Data Sampling Timing and Reception Margin in Asynchronous
Mode.................................................................................................................... 378
15.4.3 Clock.................................................................................................................... 379
15.4.4 SCI Initialization (Asynchronous Mode)............................................................. 380
15.4.5 Data Transmission (Asynchronous Mode)........................................................... 381
15.4.6 Serial Data Reception (Asynchronous Mode)...................................................... 383
15.5 Multiprocessor Communication Function......................................................................... 387
15.5.1 Multiprocessor Serial Data Transmission............................................................ 388
15.5.2 Multiprocessor Serial Data Reception ................................................................. 390
15.6 Operation in Clocked Synchronous Mode ........................................................................ 393
15.6.1 Clock.................................................................................................................... 393