Datasheet

Section 8 I/O Ports
Rev. 3.00 Mar 21, 2006 page 215 of 788
REJ09B0300-0300
• PB0/D0/WUE0/HIRQ3/LSMI
*
4
The pin function is switched as shown below according to the combination of the operating
mode, the HI12E and CS3E bits in SYSCR2, the LSMIE bits in HICR0 of host interface
(LPC), the ABW bit in WSCR, and the PB0DDR bit.
Operating
Mode
Modes 1, 2, 3 (EXPE = 1) Mode 2, 3 (EXPE = 0)
LSMIE 0
*
3
01
HI12E — 1 0
*
1
CS3E —
Either cleared to 0
1—
ABW 0 1 — — —
PB0DDR — 0 1 0 1 — 0
*
1
PB0
input pin
PB0
output pin
HIRQ3
output pin
LSMI
*
4
output pin
PB0
input pin
PB0
output pin
LSMI input pin
*
2
Pin
Function
D0 I/O pin
WUE0 input pin
*
2
Notes: 1. When bit LSMIE is set to 1 in HICR0, bits HI12E and PB0DDR should be cleared to 0.
2. Except when used as a data bus pin, this pin can always be used as the WUE0 input
pin. The HIRQ3 output pin and LSMI I/O pin can only be used in mode 2 or 3 (EXPE =
0).
3. In mode 1, 2, 3 (EXPE = 1), clear the LSMIE bit to 0.
4. Not supported by the H8S/2148B and H8S/2145B (5-V version).