Datasheet

Section 23 ROM
Rev. 3.00 Mar 21, 2006 page 621 of 788
REJ09B0300-0300
Table 23.6 System Clock Frequencies for which Automatic Adjustment of LSI Bit Rate Is
Possible
Host Bit Rate
System Clock Frequency
Range of LSI (3-V Version)
System Clock Frequency
Range of LSI (5-V Version)
19200 bps 8 to 10 MHz 8 to 20 MHz
9600 bps 4 to 10 MHz 4 to 20 MHz
4800 bps 2 to 10 MHz 2 to 18 MHz
Boot program area
*
(128 bytes)
H'FFFF7F
H'FFFF00
H'FFEFFF
H'FFE880
H'FFE088
H'FFE080
ID code area
Programming control program area
(2040 bytes)
Boot program area* (1920 bytes)
H8S/2140B, H8S/2141B, H8S/2148B,
H8S/2160B, and H8S/2161B
H8S/2145B
Boot program area* (128 bytes)
H'FFFF7F
H'FFFF00
H'FFEFFF
H'FFE880
H'FFD088
H'FFD080
ID code area
Programming control program area
(6136 bytes)
Boot program area* (1920 bytes)
Note: * The boot program area and area which is not used cannot be used until a transition is made
to the execution state for the programming control program transferred to RAM.
Note that the contents of the boot program area in RAM are remained after a branch is made to
the programming control program.
Figure 23.8 On-Chip RAM Area in Boot Mode
In boot mode, this LSI checks the contents of the 8-byte ID code area as shown below to confirm
that the programming control program corresponds with this LSI. To originally write a
programming control program to be used in boot mode, the above 8-byte ID code must be added at
the beginning of the program.