Datasheet

Section 27 Electrical Characteristics
Rev. 3.00 Mar 21, 2006 page 765 of 788
REJ09B0300-0300
27.3.3 Bus Timing
The bus timings are shown below.
t
RSD2
φ
T
1
t
AD
t
CSD
AS
*
A23 to A0,
IOS
*
Note: * AS and IOS are the same pin. The function is selected by the IOSE bit in SYSCR.
t
ASD
RD
(read)
T
2
t
AS
t
ASD
t
ACC2
t
RSD1
t
ACC3
t
RDS
t
WRD2
t
WRD2
t
WDD
t
WSW1
t
WDH
D15 to D0
(read)
HWR, LWR
(write)
D15 to D0
(write)
t
AH
t
AH
t
AS
t
AS
t
RDH
Figure 27.11 Basic Bus Timing (Two-State Access)