Datasheet

Section 27 Electrical Characteristics
Rev. 3.00 Mar 21, 2006 page 711 of 788
REJ09B0300-0300
Clock Timing: Table 27.5 shows the clock timing. The clock timing specified here covers clock
(φ) output and clock pulse generator (crystal) and external clock input (EXTAL pin) oscillation
settling times. For details on external clock input (EXTAL pin and EXCL pin) timing, see section
25, Clock Pulse Generator.
Table 27.5 Clock Timing
Conditions: V
CC
= 2.7 V to 3.6 V, V
CC
B = 2.7 V to 5.5 V, V
SS
= 0 V, φ = 2 MHz to maximum
operating frequency, T
a
= –20 to +75°C
Condition
10 MHz
Item Symbol Min Max Unit Reference
Clock cycle time t
cyc
100 500 ns Figure 27.6
Clock high pulse width t
CH
30 — ns
Clock low pulse width t
CL
30 — ns
Clock rise time t
Cr
— 20 ns
Clock fall time t
Cf
— 20 ns
Figure 27.6
Oscillation settling time at reset (crystal) t
OSC1
20 — ms Figure 27.7
Oscillation settling time in software
standby (crystal)
t
OSC2
8 — ms Figure 27.8
External clock output stabilization delay
time
t
DEXT
500 — µs Figure 27.7