Datasheet

Section 11 16-Bit Free-Running Timer (FRT)
Rev. 3.00 Mar 21, 2006 page 285 of 788
REJ09B0300-0300
No.
Timing of Switchover
by Means of CKS1
and CKS0 Bits FRC Operation
3 Switching from
high to low
Clock before
switchover
Clock after
switchover
FRC clock
FRC
CKS bit rewrite
N N + 2N + 1
*
4 Switching from
high to high
Clock before
switchover
Clock after
switchover
FRC clock
FRC N N + 1
CKS bit rewrite
N + 2
Note: * Generated on the assumption that the switchover is a falling edge; FRC is incremented.
11.7.5 Module Stop Mode Setting
FRT operation can be enabled or disabled using the module stop control register. The initial
setting is for FRT operation to be halted. Register access is enabled by canceling the module stop
mode. For details, refer to section 26, Power-Down Modes.