Datasheet

Section 10 14-Bit PWM Timer (PWMX)
Rev. 3.00 Mar 21, 2006 page 251 of 788
REJ09B0300-0300
10.5 Operation
A PWM waveform like the one shown in figure 10.2 is output from the PWMX pin. The value in
DADR corresponds to the total width (T
L
) of the low (0) pulses output in one conversion cycle
(256 pulses when CFS = 0, 64 pulses when CFS = 1). When OS = 0, this waveform is directly
output. When OS = 1, the output waveform is inverted, and the DADR value corresponds to the
total width (T
H
) of the high (1) output pulses. Figures 10.3 and 10.4 show the types of waveform
output available.
t
f
t
L
T: Resolution
T
L
= t
Ln
(OS = 0)
(When CFS = 0, m = 256
When CFS = 1, m = 64)
Notes:
m
n = 1
1 conversion cycle
(T × 2
14
(= 16384))
Base cycle
(T × 64 or T × 256)
Figure 10.2 PWM D/A Operation