Datasheet

Section 10 14-Bit PWM Timer (PWMX)
Rev. 3.00 Mar 21, 2006 page 244 of 788
REJ09B0300-0300
10.2 Input/Output Pins
Table 10.1 lists the PWM (D/A) module input and output pins.
Table 10.1 Pin Configuration
Name Abbreviation I/O Function
PWM output pin X0 PWX0 Output PWM output of PWMX channel A
PWM output pin X1 PWX1 Output PWM output of PWMX channel B
10.3 Register Descriptions
The PWM (D/A) module has the following registers. The PWM (D/A) registers are assigned to the
same addresses with other registers. The registers are selected by the IICE bit in the serial timer
control register (STCR). For details on STCR, see section 3.2.3, Serial Timer Control Register
(STCR).
• PWM (D/A) counter H (DACNTH)
• PWM (D/A) counter L (DACNTL)
• PWM (D/A) data register AH (DADRAH)
• PWM (D/A) data register AL (DADRAL)
• PWM (D/A) data register BH (DADRBH)
• PWM (D/A) data register BL (DADRBL)
• PWM (D/A) control register (DACR)
Note: The same addresses are shared by DADRA and DACR, and by DADRB and DACNT.
Switching is performed by the REGS bit in DACNT or DADRB.