Datasheet

Section 8 I/O Ports
Rev. 3.00 Mar 21, 2006 page 229 of 788
REJ09B0300-0300
8.16.3 Port G Input Data Register (PGPIN)
Reading PGPIN always returns the pin states.
Bit Bit Name Initial Value R/W Description
7 PG7PIN Undefined
*
R
6 PG6PIN Undefined
*
R
5 PG5PIN Undefined
*
R
4 PG4PIN Undefined
*
R
3 PG3PIN Undefined
*
R
2 PG2PIN Undefined
*
R
1 PG1PIN Undefined
*
R
0 PG0PIN Undefined
*
R
PGPIN indicates the port G state. PGPIN has the
same address as PGDDR. If a write is performed,
the port G settings will change.
Note: * The initial value is determined according to the PG7 to PG0 pin states.
8.16.4 Port G Nch-OD Control Register (PGNOCR)
PGNOCR specifies the output driver type for pins on port G which are configured as outputs on a
bit-by-bit basis.
Bit Bit Name Initial Value R/W Description
7 PG7NOCR 0 R/W
6 PG6NOCR 0 R/W
5 PG5NOCR 0 R/W
4 PG4NOCR 0 R/W
3 PG3NOCR 0 R/W
2 PG2NOCR 0 R/W
1 PG1NOCR 0 R/W
0 PG0NOCR 0 R/W
0: NMOS push-pull (Vcc-side n-channel driver
enabled)
1: Vss-side N-channel open drain (Vcc-side N-
channel driver disabled)